A new machine for 22 nm

Applied Materials, famous equipment manufacturer, has presented a new machine for burn 22 nm transistors. It introduces a new method for the manufacture of the oxide layer of the grid, one of the great challenges of this new fineness of engraving

As mentioned in our chapter "Miniaturization and technological challenges of the future", this new fineness of engraving should mark the appearance of insulating layers "high-k using hafnium dioxide (as it has for the 45 nm)-doped yttrium oxide and silicon dioxide. At this time, we talked already about the need to update manufacturing methods to optimize the electrical permittivity.This is what today shows Applied Materials with its new machine, named Applied Centura Integrated Gate Stack. According to the OEM, one of the strengths of the system is the possibility of making the entire insulating layer under vacuum. This method calls generally four steps previously required to expose him to the ambient air, which increases the risk of damage. The four stages are the filing of the layer that will play the role of interface between silicon and the rest of the grid, the filing of the high-k, the nitriding layer to plunge the whole into a ferrous alloy to improve its properties, and finally the annealed. Manufacturer while under vacuum, Applied Materials offers higher yields and better performance. According to the press release, this manufacturing process enhances mobility within the 10% transistor and increases consistency of transistors. Previously the power to change the State of the transistor could greatly vary. With this new process, the disparities are reduced from 20% to 40%.To achieve its ends, the machine filed an insulating layer of less than 2 nm thick at a time. It is a level of accuracy still today. This method allows greater uniformity of the insulating layer.

Very schematically, the grid of a transistor acts to switch between the source and drain. It allows current to pass or not. Since 45 nm at Intel and the 32 nm in the vast majority of the other skiers, grid is composed of a metal electrode and basis of hafnium oxide layer which has a larger dielectric permittivity. We speak often of high-k dielectric. With increasing fineness of engraving, the layers of insulating silicon dioxide, previously used, became inadequate, because they were subject to a tunnel effect. Simply put, the insulating layer had trouble to block electrons. Leak currents greatly increased consumption of the transistor and threatened its operation. In amending the constitution of the grid, it was possible to overcome this problem and obtain more effective and more efficient transistors.