The future of computing will pass by the graphene and Racetrack?

IBM made a demonstration of his research for the storage of data in high density and ultra fast, all based on the Graphene.

Yesterday, the international meeting of the IEEE, Institute of electrical and electronics engineers, IBM scientists have unveiled several breakthroughs in research that could lead to major advances towards always smaller chips. More than 50 years, processors for computers increase in power and decrease in size. But have we reached the limits of Moore's law? With virtually all electronic equipment today manufactured on the basis of the CMOS, there is an urgent need to develop new materials for industry approach inevitably limits of Silicon compound transistors.

IBM demonstrated a new version of Racetrack, offering a high capacity storage as traditional hard drives, but with the speed and robustness of the flash memory. After seven years of research in physics, it is possible to show that this type of memory is possible. IBM researchers have detailed the operation of the first Racetrack memory integrated with CMOS technology. Racetrack memory stores data on Nanoscale metal wires. Bits - 1 and 0 - are represented by magnetic bands in these nanowires, which are created by the control of magnetic orientation from different parts of the wire.

Writing data is to insert a tape in a new part of a Nanowire by applying a current in one direction or the other. The reading of data is to move the tapes along the nanowires before a device capable of detecting the boundaries between each block. Researchers have demonstrated that it is possible both read and write data on a network of 256 Nanowires.

This development laid the Foundation for the Racetrack memory density. He has yet to improve the reliability and the development of circuits in three dimensions, such as those of the latest processors Intel (Tri-Gate transistors). This breakthrough could lead to the creation of a new type of data centers allowing customers to store huge amounts of information available within a billionth of a second... If the fiber network also develops.

IBM made the way the first chips in Graphene compatible CMOS can advance wireless communications, and allow to manufacture new devices at high frequencies. Devices that could even operate at temperatures until there not allowed, to avoid the melting of the circuit, even under exceptional conditions of radiation for the areas of security and medical. The circuit integrated in Graphene, used as a frequency multiplier, can mount up to 5 GHz and remains stable up to 200 degrees Celsius. These results are promising for Graphene circuits that can be used in high temperature environments.

IBM researchers have also shown yesterday the first transistor engraved below 10 nm. Expected to computers of the future use of such nuances of printmaking for processors, because today, the only Silicon cannot reach such size, which makes this use of the Graphene a breakthrough for next computer technologies. This breakthrough demonstrated also for the first time that carbon nanotubes, used in the manufacture of the binding of transistors in processors circuit, can provide excellent results, much better than some theoretical estimates had suggested.

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IBM Racetrack memory could be a reality by 2020

IBM gave a Conference of press last Wednesday on his memories of the future and for the first time, Big Blue States that its Racetack could be a reality by the end of the Decade. In addition, by three years of capacity of 1 Po can be stored in a surface equal to a 1U rack, always according to the firm.

We presented you the progress of the IBM's Racetrack last December. A reminder, this memory is based on a mechanism different from the current submissions. Instead of fetching the data bit in the cell, as is the case today, it moves on a track of a few tens of nanometers in thickness. Researchers still need many challenges and better understand its functioning, but published last December results allow to consider marketing in five to seven years, according to Big Blue. We are nevertheless talking about a project that could be abandoned or used for other purposes.

This is not the first time that IBM would work on a memory that would not see the day. Is remembered for his research on the Millepede, a chip where the information is stored in holes etched in a fine polymer. The memory cells are written and read by one of the multiple branches of a MEMS walks on the surface. The Millipede was scheduled for 2007, but too high production costs were ultimately correct its existence. The technology is not dead. Gerd Bining, head of the project at IBM, said during the Conference IEEE last May that the firm was still working on it, but no more account do the memory of tomorrow. Big Blue recycle technologies developed in other products, such as probes used in lithographic processes.

During the Conference last Wednesday, IBM has also pledged to increase memory density, without giving more details. He spoke only of "magnetic technology", according to IDG that reported the event. The fact that this technology arrives within three years suggests that he is working on his own MRAM, which would be nothing surprising. We know that it has partnered with TDK to his development and he presented a paper at the IEDM (International Electron Device Meeting) in 2010 (see "IBM and Samsung talk TWU RAM").

Things change very quickly and the STT-MRAM could start to compete with Flash memory within three years (cf. "Toshiba would out a STT-MRAM in 3 years"). Research in this area abound (cf. "A new structure of MRAM") and manufacturers show more enthusiasm for this technology, which is always a good sign.

For the record, the STT-MRAM is based on spin transfer torque (Spin-Transfer Torque in English) which is a phenomenon appearing when a spin-polarised current (which contains electrons with the same angular movement, Editor's note) passes through the junction magnetic tunnel, a structure composed of two ferromagnetic elements separated by a thin insulating layer. As shown in the diagram on the left, one of the ferromagnetic layers is said trapped by Antiferromagnetic element. Whatever happens, its polarity will remain unchanged. However, the other layer is free and the polarized current through the junction tunnel effect, it will adopt the spin of electron sent, a phenomenon known as Spin-transfer Switching. We will then measure the magnetic strength of the structure. If it is strong, it means that the two ferromagnetic plates have opposite polarities, which represents a 0. If it is low, the polarities are identical, which is a 1.

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